On September 12, the US Patent & Trademark Office published six of Apple’s newly granted patents which included the following: ‘Method and apparatus for saving power in pipelined processors,’ ‘Method and apparatus for implementing a sleep proxy for services on a network,’ ‘Single-channel convolution in a vector processing computer system,’ ‘Modular logic board chassis for a desktop computer,’ ‘Mechanism for color-space neutral (video) effects scripting engine’ and ‘Rendering translucent layers in a display system.’
Method and apparatus for saving power in pipelined processors
Apple’s Summary: The present invention reduces power consumption in pipelined processors, for example, Very Long Instruction Word processors. In one embodiment of the invention, power consumption is reduced by causing only selected sections of the functional units to draw current from a power source. Specifically, the functional units will be controlled such that only selected stages of the functional units will draw current. The reduction in power requirements facilitated by the present invention can also serve to significantly reduce the amount of heat dissipated by the hardware system implementing the invention. Reducing heat dissipation is a major factor that may allow for the reduction of the size of microelectronic devices. Power reduction can also allow battery discharge cycle lengths to be extended. Obviously, both the heat dissipation and battery life improvements are very desirable results.
As a method, one embodiment of the present invention includes at least the operation of evaluating instructions to be executed to determine the operation type of the instructions, producing activity indicators based upon the operation types of the instructions, and controlling each of the stages such that only selected stages draw current from a power supply. The controlling of the supply of current is based upon activity indicators that are associated with each of the stages.
As an apparatus, one embodiment of the present invention includes at least an instruction evaluation unit that evaluates a next instruction to be executed and which produces activity indicators, a functional unit for executing instructions, the functional unit having a plurality of stages, each of the stages capable of being separately activated or deactivated based upon a respective activity indicator, and a stage activation controller that utilizes the activity indicators and causes each of the stages to be activated or deactivated.
Inventor of granted patent 7,107,471: Gary F. Feierbach
Method and apparatus for implementing a sleep proxy for services on a network
Apple’s Abstract: One embodiment of the present invention provides a system for implementing a sleep proxy. The system starts by receiving a request at the sleep proxy for information pertaining to a service provided by a device. In response to this request, the system determines if the device is a member of a list of devices for which the sleep proxy takes action. If so, the system determines if the sleep proxy can answer the request. If so, the sleep proxy sends a response to the request on behalf of the device. In a variation on this embodiment, if the system cannot answer the request on behalf of the device, the system sends a wakeup packet to the device, wherein the wakeup packet causes the device to exit a power-saving mode so that the device can respond to the request directly.
Inventor of granted patent 7,107,442: Stuart D. Cheshire
Single-channel convolution in a vector processing computer system
Apple’s Abstract: A system and method for performing convolution in a single channel of a vector processing computer system takes advantage of the parallel computing capability of the vector processing system and the distributed properties of the discrete-time convolution sum by performing convolution on portions of an overall data stream, or data chunks, simultaneously. Partial solution are thereby obtained and superimposed to achieve an overall solution data stream. To simplify the convolution sum and eliminate the need for calculating products, a specialized data signal or vector containing a series of ones may be used in the convolution operation.
Apple’s Summary: In accordance with the present invention, these objectives are achieved by a system and method that performs convolution in a single channel of a vector processing computer system. This system and method take advantage of the distributive properties of the discrete-time convolution sum by reading in data, buffering data into a given number of data chunks, transposing the data chunks within a matrix to align the first bit of each data chunk, performing the convolution sums on each of the columns of a matrix simultaneously, storing the results from each column’s convolution sums as partial solutions, superimposing the results of each column’s convolution sums into a single data stream representing an overall solution to be further processed by the computer. According to an embodiment of the invention, the data is transposed and manipulated within a matrix. According to another embodiment of the present invention, one of the data signals or vectors used in the convolution sum is a vector comprising a series of ones. By utilizing a series of ones, a simplification of the overall convolution sum, which is the sum of products is achieved as the operation is reduced to an operation of sums only.
Inventors of granted patent 7,107,304: Ali Sazegari and Doug Clarke.
Modular logic board chassis for a desktop computer
Apple’s Abstract: A computer (10) having a monitor housing (12) within which is affixed a logic module (24) having thereon a processor (36), a memory module (38), an internal power connector (39), a fixed disk drive (40), an internal data connector (41), and an external connector panel (46) all generally housed within a sheet metal housing (42) having therein a plurality of perforations (44) for allowing air from a fan assembly (30) to pass therethrough. A power supply (28) and monitor screen (14) are provided in the monitor housing (12) such that when the logic module (24) is mounted and electrically connected within the monitor housing (12) a generally complete computer (10) unit is provided. An auxiliary drive (16) is optionally provided and affixed to the logic module (24) such that the auxiliary drive (16) is externally accessible when the logic module (24) is affixed within the monitor housing (12).
Inventors of granted patent 7,106,581: Robert Norman Olson, David V. Hoenig, Christopher J. Novak and Glen T. Walters
Mechanism for color-space neutral (video) effects scripting engine
Abstract: A first command is retrieved from a script containing one or more commands written for a first color space. The first command is associated with zero or more input buffers and zero or more output buffers. The first command has zero or more parameters. A behavior of the first command in the first color space and in a second color space is determined. The behavior comprises one of unique behavior, transparent behavior, and different behavior. The first command has the unique behavior when the first command only operates in the first color space. The first command has the transparent behavior when the first command generates similar results in the first color space and in the second color space. The first command has the different behavior when the first command generates different results in the first color space and in the second color space. Using the behavior of the first command, an operation associated with the first command is processed. The operation is processed in a preferred format based on current formats of the input buffers.
Inventors of granted patent 7,106,345: Eric Graves and Randall H. Ubillos
Rendering translucent layers in a display system
Apple’s Abstract: A system and method of rendering overlapping layers in a computer display, such as a windowing system, employs front-to-back assembly of the displayed image. An arbitrary number of overlapping elements, such as windows, can be presented, without requiring temporary storage space or additional off-screen buffers. The front-to-back assembly technique minimizes the number of memory transfers performed in connection with rendering an image, and avoids unnecessary reading and processing of pixels that will not contribute to the final image. Special effects such as semi-transparency, shadows, and irregular shapes can be accommodated and processed in an efficient manner.
Inventors of granted patent 7,106,275: Brunner; Ralph T. Brunner and Peter Graffagnino.
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Written and researched by Neo.
